PCI-SIG®, PCIe® and the PCI Express® are US registered trademarks and/or service marks of PCI-SIG.
Keysight’s PCIe protocol analyzer is a combination of hardware and software features that ensure the fastest time to insight.
Industry unique ESP technology for accurate data capture
For any analyzer at PCIe 3.0 speeds, the key is how to recover the signal accurately in different types of platforms and systems. Keysight’s PCIe 3.0 analyzer uses Keysight’s unique ESP (Equalization Snoop Probe) technology, with the ability to tune the equalization algorithm used according to the type of channel the analyzer is monitoring. This ensures that the data captured in the analyzer is exactly what is on the wire. Without this capability, at 8 GT/s, there is a high likelihood of misrepresentation of the data on the bus, which can lead to wasted hours (if not days) in the validation cycle.
Flexible hardware architecture
Keysight’s PCIe analyzer combines accurate probing technology with flexible hardware architecture. The analyzer hardware supports all three generations of PCIe 1.0 through PCIe 3.0 and supports x1 link width through x16. Keysight’s protocol analyzers use a modular chassis-based architecture. For additional flexibility, a single x16 configuration can be split into two separate smaller link width test systems, providing maximum equipment utilization.
Analysis tools for PCIe traffic
Transactional analysis of NVMe and PCIe data includes the tools for finding and decoding the protocol information, making it easy to locate the protocol errors or to validate device operation. Keysight’s GUI uses the industry-standard spreadsheet style for presentation of protocol information. This makes data viewing clear and precise through a table-based approach. Keysight’s protocol viewers include the easy-flow and color-by-packet-type features to further highlight the stimulus and response nature of the protocols so it is easy to see the request being sent and the data being received. Viewers for the protocol analyzer include Lane, Packet, Navigation, LTSSM, and Performance Summary, showing data from the physical layer up through the transaction layer.
Ключевые возможности и технические характеристики
- Supports 2.5 GT/s (Gen1), 5.0 GT/s (Gen2) and 8.0 GT/s (Gen3) speeds
- x1 through x16 link width support
- 8 GB capture for x1 to x8 bidirectional, up to 16 GB capture for x16 bidirectional
- CEM slot, M.2 (M-key), and SFF-8639 PCIe interposers; PCIe Gen3 midbus probe, flying leads
Data viewing and navigation
- Packet viewer with flexible coloring, color by packet type or direction
- Lane view with packet highlighting to show the actual data on the bus (header, payload?)
- Simple packet filter, quick search and auto compute
- Correlation across all views, clicking in one view quickly navigates you to the same point in time in another view
- LTSSM overview with equalization analysis helps verify the link training process and identify reasons for failure
- Traffic overview with detailed traffic pattern analysis and graphing
- Performance analysis with utilization, throughput, response time and latency measures (including flow control analysis)
- Transaction decode of PCIe, NVMe and AHCI with data analysis with data overview
Simple-to use, powerful state-based triggering
- Simple-to-use filters and triggers
- Advanced triggering for complex scenario analysis (ex. missing completion)